KitGuru KitGuru.net – Tech News | Hardware News | Hardware Reviews | IOS | Mobile | Gaming | Graphics Cards
Contemporary multi-core AMD Opteron microprocessors for high-end servers utilize multi-chip-module (MCM) technology that places two six-/eight-core dies onto the same piece of substrate to create 12-core or 16-core solutions. However, a new document from AMD suggests that the chip designer is working on “native” 16-core processors with all cores on the same die.
In a bid to ensure support of its latest A-series “Kaveri” accelerated processing units by software developers, AMD released a new “Software Optimization Guide for AMD Family 15h Processors” document this month. The paper contains recommendations how to optimize apps for various central processing units that belong to 15h family (15h stands for the Bulldozer micro-architecture and derivatives) as well as references to various CPUs, including existing and upcoming ones.
The page 197 from the document reveals that AMD is developing a Family 15h processor (Bulldozer and derivatives) model 30h – 3Fh (Steamroller micro-architecture) with eight compute nodes (which is how AMD calls its dual-core Bulldozer/Piledriver/Steamroller/Excavator modules), interconnected using system request interface (SRI) with one crossbar (XBAR) that handles communication between the SRI, memory controller (MCT) and HyperTransport (HT) links. The topology of the microprocessor unmistakably points to a single-die multi-core chip with up to sixteen cores/eight modules.
“Newer models of Family 15h processors offer five links for connections to I/O and other processors. Of the five links, one link supports PCIe 3.0, two support coherent HyperTransport, and two are capable of either coherent HyperTransport or PCIe 3.0. These processors have 8 compute units (16 cores),” the document from AMD, which was found by Planet3DNow.de, reads. Keeping the amount of links in mind, it looks like the chip is aimed primarily at servers.
Later this year AMD plans to release Opteron code-named “Warsaw” microprocessor with 12 or 16 cores based on the Piledriver micro-architecture, which will be on the market till late 2015, at least. Therefore, it is likely that the “native” 16-core chip will emerge in 2015 – 2016 timeframe. Theoretically, AMD could easily create a 32-core multi-chip module for use in high-end servers by swapping two 16-core dies onto a piece of substrate.
AMD did not comment on the news-story.
KitGuru Says: Since AMD’s server and high-end desktop design resemble each other, but the company never uses MCMs for FX-series microprocessors, it is logical to assume that the FX chips due in 2015 – 2016 will rely on the Steamroller micro-architecture as well as on eight-module/sixteen-core die. The chip should be rather powerful, especially if its clock-rate is high enough.
Is this Anton Shilov from X-bit labs? I haven’t noticed your articles before, but checked now and looks like you’re on-board from the new year.
Applying this tech to Arm64 cores means the SRI bus becomes the AMBA CNI and the MCT becomes the cache memory controller, then throw in 32 MB of cache to 4 Arm quads makes a monster 16core Arm superchip!. I bet this will take less transistors than a 8core x86 processor.