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PCI Express 4.0 on track to double the bandwidth

The PCI Express technology has served as the main standard for PC and server expansion slots for exactly ten years now and will probably be used for many years to come. Members of the PCI SIG [special interest group] reportedly agreed to double the bandwidth of the PCI Express 4.0 compared to the PCI Express 3.0.

At present members of the PCI SIG are about to finish reviewing the PCI Express 4.0 base specification revision 0.3. This specification describes the PCI Express architecture, interconnect attributes, fabric management, and the programming interface required to design and build systems and peripherals that are compliant with the PCI Express specification. The PCI SIG members have been reviewing the spec since February and, according to a Tom’s Hardware report, decided to stick to the plan that has existed since late 2011: to boost the base per-lane PCIe 4.0 transfer rate to 16GT/s [gigatransfers per second].

Thanks to 16GT/s base transfer rate, each PCI Express 4.0 x1 slot will be able to transfer up to 2GB of data per second, whereas the PCIe 4.0 x16 slot, which will be used for graphics cards and ultra-high-end solid-state drives, will provide up to 31.5GB/s of bandwidth.

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But increased transfer speed is not the only thing that the PCI Express 4.0 is expected to bring. High-speed interconnections mean that computer devices spend less time to transfer data and thus save battery life of mobile devices.

It is expected that Intel Corp.’s code-named Skylake microprocessors for servers will feature an integrated PCI Express 4.0 controller, which will help them to connect to very high-performance chips, such as graphics processing units or Intel Xeon Phi co-processors. Since in the future GPUs are projected to assist central processing units (CPUs) in highly-parallel tasks and such heterogeneous computing will require the chips to share the data in their memory pools, high-performance interconnections will be very important.

Intel and other members of the PCI SIG did not comment on the news-story.

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KitGuru Says: The current version of the PCI Express 4.0 specification is 0.3. It will be interesting to see whether the standard will be finalized by the time Intel will start mass production of the Skylake central processing units for desktop or laptops, which is Q1 2015, if the rumours are correct. Perhaps, when it comes to client processors, the Skylake chips will not feature PCIe 4.0, but the interconnection will only be supported by the chips currently known as the Airlake and the Cannonlake.

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One comment

  1. We aren’t even maxing out gen 2.0 (with a single gpu), why implement 4.0????