TSMC: 16nm yields are approaching mature levels

Although Taiwan Semiconductor Manufacturing Co. has delayed mass production of chips using its 16nm fabrication processes, this did not happen only because of low yields. According to the company, 16nm yields at TSMC are approaching mature levels.

This year TSMC will offer two 16nm process technologies for clients: 16nm FinFET (CLN16FF) and 16nm FinFET+ (CLN16FF+). Both technologies use FinFET transistors, but rely on the back-end-of-line (BEOL) interconnect flow of the company’s 20nm SOC (CLN20SOC) fabrication process. Usage of FinFET transistors allows to increase clock-rate potential of chips by up to 40 per cent at the same power over chips made using 20nm technology.

TSMC claims that 16nm FinFET+ provides up to 15 per cent performance improvement over the 16nm FinFET at the same level of power consumption. At the same frequency, integrated circuits produced using 16nm FinFET+ are projected to consume 30 per cent less power compared to the same chips made using 16nm FinFET.

TSMC originally planned to start making 16nm chips in early 2015, but had to postpone the beginning of volume production due to undisclosed reasons. While TSMC’s motives to delay mass production were unclear, it does not look like the company has major problems with yields. According to Y.J. Mii, vice president of R&D at TSMC, CLN16FF+ yield is already approaching CLN20SoC yield (which is mature enough to use for commercial products), according to a Cadence blog post. The VP reportedly said that the 16FF+ provided better maturity at risk production than any previous TSMC process.

TSMC has received over 12 CLN16FF+ tape outs so far and expects more than 50 product tape outs this year. High-volume production will begin in the third quarter, with meaningful revenue contribution starting in the Q4 2015.

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KitGuru Says: While it looks like TSMC’s 16nm yields are reasonably high, keep in mind that the company’s 16nm chips have the same die sizes as ICs made using 20nm process tech. Since TSMC naturally charges extra for FinFET transistors as well as extra performance and lower power, per-gate costs of products made using 16nm FinFET technologies should be pretty high. As a result, to make those chips economically feasible, TSMC’s clients require generally very high yields.

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