Rambus this week said that it will officially introduce its all-new datacenter-class dynamic random access memory (DRAM) architecture in the coming weeks. The new DRAM is expected to shrink latencies and increase capacities of computer memory chips, something that is tremendously important for servers working with big data and in-memory databases.
“We are gearing up for a new product announcement just ahead of the Intel developer forum next month,” said Ron Black, chief executive officer of Rambus, during a conference call with investors and financial analysts. “This product pertains to two of the strategic memory programs we have discussed previously.”
Earlier this year Rambus disclosed that it was working on a new DRAM architecture aimed specifically at datacenters. The new DRAM tech was supposed to solve challenges associated with capacities and latencies of DRAM for servers. Rambus also indicated that at least two major producers of memory were interested in its new DRAM type.
This time the company did not reveal many additional details about the new memory architecture, but it did reiterate that the new type of memory will not replace NAND flash, but is designed to be a new DRAM technology.
“We have been working for the past few years to make our IP consumable taking our intuitive technologies and expertise in the memory space and packaging it into a product that will help improve server-based memory performance,” said Mr. Black. “Our product while not related to storage class memory architectures, as some had speculated, will improve both bandwidth and capacity requirements to meet the growing needs of the datacenter.”
It is noteworthy that Rambus will discuss the new technology ahead of Intel developer forum, not at the IDF, which may indicate that its new type of DRAM is not exactly a part of Intel’s roadmap.
Although Rambus’ RDRAM, XDR, XDR2 and mobile XDR memory architectures sported a lot of advantages compared to industry-standard types of DRAM, they have never managed to become popular on the market due to multiple reasons. Therefore, if Rambus wants its datacenter memory type to become popular, it will need to make it a breakthrough. Moreover, somehow Rambus will have to convince Intel Corp. to support its new DRAM architecture. Intel’s upcoming Xeon “Skylake” processors will support over 6TB of memory per socket, hence, they will hardly need to support a proprietary type of memory.
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KitGuru Says: Without any doubts, Rambus engineers are capable of developing breakthrough memory architectures. However, it looks like Intel and its partners already have solutions that are based on industry-standard products and technologies. As a result, Rambus’ proprietary memory types may simply not be needed…
Intel/HP got burned by Rambus on the Itanium chip (the eye for the valid memory read was TINY). I doubt they are going to go and do it all over again with another proprietary Rambus development.
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